1. Field of the Invention
This invention relates to methods and apparatus for systems for manufacture of semiconductor devices and more particularly to yield loss analysis in yield management systems.
2. Description of Related Art
U.S. Pat. No. 5,598,341 of Ling et al. for xe2x80x9cReal-Time In-Line Defect Disposition and Yield Forecasting Systemxe2x80x9d shows a real time defect disposition and yield forecasting system which uses KLA and INSPEC inspection tools. A particle in contact with two conductor lines is described as a xe2x80x9ckiller defect.xe2x80x9d It is stated that the particle xe2x80x9cmay kill or prevent the normal operation of the semiconductor device which utilizes conductors . . . xe2x80x9d Ling describes a real time, in-line system. An inspection method/tool provide for inspection of at least two layers of a semiconductor wafer, producing xe2x80x9cfirst informationxe2x80x9d on particle size, particle location, and the number of particles. A design review station inspects those at least two layers and produces xe2x80x9csecond informationxe2x80x9d including the layouts of each of those at least two layers. A yield management station is operatively connected to the in-line fabrication inspection tool and to the design review station. The yield management station determines at least one of a number of killer defects for the devices in each of the at least two layers or a defect sensitive area index for each of the at least two layers responsive to layers using the first and second information. Determination of a priority is made for analyzing each of the at least two layers responsive to at least one of the number of killer defects and the defect sensitive area index for each of the at least two layers. See col. 5, line 55 to col. 7, line 8. Ling does not appear to disclose the 6th order polynomial curve fit to identify the killer stage, but Ling does describe a general analysis method/tool/program, Col. 6, line 55 to Col. 7, line 8.
U.S. Pat. No. 5,475,695 of Caywood et al. for xe2x80x9cAutomatic Failure Systemxe2x80x9d teaches an automatic failure analysis system which discloses automatic fault extraction (AFE) and a specific analysis technique called inductive fault analysis (IFA).
U.S. Pat. No. 4,801,869 of Sprogis for xe2x80x9cSemiconductor Defect Monitor for Diagnosing Processing-Induced Defectsxe2x80x9d shows a design for a defect monitor pattern/wafer.
U.S. Pat. No. 5,544,256 of Brecher for xe2x80x9cAutomated Defect Classification Systemxe2x80x9d shows an automated defect classification system for analyzing digital images of defects.
KLA In-line defect inspection tools and the Yield Management System (YMS) are popular tools for studying the visual defect in process but heretofore, there has been no systematic method for determining the correlation between yield loss and visual defects. In the more complicated manufacturing processes, the state of the art methods of yield loss analysis have made it difficult to correlate the major killing stages to the resulting losses in yield. Thus it has been difficult to be efficient in selecting which action to take to improve the yield.
An object of this invention is to identify the correlation between yield loss and visual defects and to find out the major yield killing stages.
The invention includes a yield management method which performs the features as follows:
Cp Yield Test;
The definition of four kinds of dies from the Cp yield test;
The defective bad die compared with yield loss;
The definition of defective bad die percentage (DBD%) and defective bad die count (DBDC);
A trend chart comparison between DBD% and yield loss;
A trend chart comparison between DBDC and yield loss;
Finding the major killer stages.
The invention is a yield management system which performs the functions as follows:
1) correlates the visual defects on dies on a wafer to loss of die yield,
2) accumulates data for run analysis to produce plots of data for each wafer on a stage by stage basis, which can be used to find the killer stage, and
3) uses a polynomial curve fitting (6th order) method to produce curves which are compared to determine which of the stages of the production line is the killer stage.
The present invention focuses upon a single stage of manufacture of a single layer at a time, unlike Ling et al.
Analysis is made of the percentage of defective bad dies (DBD %) compared with yield loss in as expressed in a trend chart.
In addition, analysis is made of the Defective Bad Die Count (DBDC) compared with the yield loss as expressed in a trend chart.
Further factors to consider are as follows:
1. DBD %: that can involve at least two different types of products but they use the same design rule (i.e. 0.5 xcexcm design rule.)
2. DBDC: just for the single product analysis.
The system is used to analyze the overall yield trend. This system forecasts the applicability of the process employed to different products from the one being focused upon. (DBD %)
Caywood et al. discloses a specific analysis technique which is different from the sixth (6th) degree polynomial regression of the invention.
In accordance with this invention, a method for yield loss analysis for use in determining the killer stage in the manufacture of a semiconductor wafer at a plurality of manufacturing stages comprises the following steps.
Inspect semiconductor devices on the wafer visually to identify the location of visual defects on dies being manufactured on the wafer and to maintain a count of visual defects on the dies by location.
Inspect the semiconductor dies on the wafer to determine the location and number defective dies on the wafer at each of the manufacturing stages.
Calculate the defective die count for each stage for the wafer.
Calculate the defective bad die count for each stage for the wafer.
Determine the percentage of the defective bad die count divided by the defective die count.
Plot the trend of the percentage of yield loss and the percentage of defective bad dies for each of the manufacturing stages. and
Compare the plots to determine the killer stage from analysis of the relative trends of matching between the plots of yield lost and the percentage of bad dies for the stage.
Preferably the method includes the additional steps, as follows:
Plot the trend of the percentage of yield loss and the percentage of defective bad dies for each of the manufacturing stages with sixth order fitting curves.
Compare the plots with the sixth order fitting curves to determine the killer stage from analysis of the relative trends of matching between the plots of yield lost and the percentage of bad dies for the stage.
Calculate the defective bad die count for several combined stages.
Plot a trend chart for the combined plot.
Preferably plot that trend chart for stages with fitting curves which indicate possibly matching trends.
In accordance with another aspect of this invention, a system for yield loss analysis for use in determining the killer stage in the manufacture of a semiconductor wafer at a plurality of manufacturing stages is provided.
The system comprises as follows:
Means for inspecting semiconductor devices on the wafer visually to identify the location of visual defects on dies being manufactured on the wafer and to maintain a count of visual defects on the dies by location;
Means for inspecting the semiconductor dies on the wafer to determine the location and number defective dies on the wafer at each of the manufacturing stages;
Means for calculating the defective die count for each stage for the wafer;
Means for calculating the defective bad die count for each stage for the wafer;
Means for determining the percentage of the defective bad die count divided by the defective die count;
Means for plotting the trend of the percentage of yield loss and the percentage of defective bad dies for each of the manufacturing stages; and
Means for comparing the plots to determine the killer stage from analysis of the relative trends of matching between the plots of yield lost and the percentage of bad dies for the stage.
Preferably the system includes:
Means for plotting the trend of the percentage of yield loss and the percentage of defective bad dies for each of the manufacturing stages with sixth order fitting curves;
Means for comparing the plots with the sixth order fitting curves to determine the killer stage from analysis of the relative trends of matching between the plots of yield lost and the percentage of bad dies for the stage;
Means for calculating the defective bad die count for several combined stages;
Means for plotting the trend of the percentage of yield loss and the percentage of defective bad dies for each of the manufacturing stages with sixth order fitting curves;
Means for plotting a trend chart for the combined plot;
Means for plotting a trend chart for stages with fitting curves which indicate possibly matching trends.